01 / values
Nonuniform Codebook10
More distinct levels sit near zero, where sharply peaked neural weights are concentrated.
Crown Citadel Research Report
ROCmFP4 is not stock Q4 with a new label. It changes where the representable values sit, how scale metadata is allocated, how the scale is selected, and which tensors receive extra protection—all around an AMD-friendly integer-dot layout.
Same metadata budget. Twice the local scale granularity on the quality path.
The thesis
Two 4-bit formats can spend identical weight bits yet reconstruct a model very differently. ROCmFP4 improves the quality per byte by reshaping the value grid, localizing scale error, optimizing reconstruction, and protecting sensitive tensors.
01 / values
More distinct levels sit near zero, where sharply peaked neural weights are concentrated.
02 / metadata
The same two metadata bytes become one UE4M3 scale for each 16-weight half.
03 / fitting
Finite scale candidates are scored by reconstruction error, with optional importance weighting.
04 / recipe
Large tolerant tensors stay compact while embeddings and attention K/V receive targeted protection.
| Property | Stock Q4_0 | Dual ROCmFP4 | ROCmFP4 FAST |
|---|---|---|---|
| Weights per block | 32 | 32 | 32 |
| Representable grid | Uniform integer steps | E2M1-derived Codebook10 | E2M1-derived Codebook10 |
| Scale metadata | 1 × FP16 (2 bytes) | 2 × unsigned E4M3 (2 bytes) | 1 × unsigned E4M3 (1 byte) |
| Scale grouping | 1 × 32 weights | 2 × 16 weights | 1 × 32 weights |
| Block size / density | 18 bytes / 4.50 BPW | 18 bytes / 4.50 BPW | 17 bytes / 4.25 BPW |
| Reference scale choice | Signed abs-max derived | Finite-scale MSE search | Finite-scale MSE search |
Smarter value grid
Stock Q4_0 lays down evenly spaced integers. ROCmFP4 uses 0, ±1, ±2, ±3, ±4, ±6, ±8, ±10—fine steps near zero, wider steps in the tails. Move the probe to see where each normalized grid snaps.
Normalized grid only; block-scale selection is intentionally isolated in the next two labs.
Codebook10
A sharply peaked distribution benefits from more nearby reconstruction choices around zero, while rare large values can tolerate coarser spacing.
Retuned maximum
The E2M1-derived outer magnitude was reduced after experiments on Qwen dense tensors, lowering the pull of rare outliers.
Exact identity
The packed nibbles expand into signed integer levels for cheap integer dot products. This is not standard E2M1 data dispatched to an FP4 instruction.
Two scales, same cost
A single Q4_0 scale couples the whole block. ROCmFP4’s two one-byte scales let each 16-weight half fit its own range. Increase the outlier and watch the calm half retain its detail.
Illustrative browser simulator. ROCmFP4 uses the implementation’s Codebook10 and full finite UE4M3 candidate set; the Q4_0 lane models its signed abs-max reference scale.
Best-fit scale search
ROCmFP4 starts near max_abs / 10, expands across finite UE4M3 candidates, and scores reconstruction MSE. Safe pruning stops work that cannot beat the current best without changing the selected result.
Selected candidate
Scale details will appear here.
Why clipping can win
If a slightly smaller scale clips an unimportant outlier but sharply reduces error across the rest of the group, its total weighted MSE can be lower.
Quality guardrail
A faster candidate-window search worsened short WikiText-2 perplexity on the FAST path, so the exact exhaustive candidate set stayed.
Mixed precision where it matters
The strongest ROCmFP4 artifacts do not force every tensor through one layout. They keep the largest tolerant tensors compact and spend more bits or scale granularity at sensitive boundaries.
STRIX_LEAN uses Q5_K at the token boundary, dual-scale ROCmFP4 for attention K/V, and 4.25-BPW FAST ROCmFP4 for most large dense tensors.
Embeddings are relatively small but coherence-sensitive. STRIX_LEAN promotes them to Q5_K; STRIX spends a little more with Q6_K.
Technical boundaries
Clear boundaries keep a real engineering format from turning into a vague “FP4 is magic” claim.
The stored values are expanded into signed integer lanes for dot products. They are not simply sent to a standard hardware FP4 instruction.
Dual and FAST layouts solve different local problems, while STRIX selects tensor types according to sensitivity.
The design targets quality per byte and AMD execution. Exact gains still depend on model family, tensor distribution, recipe, backend, and validation set.
The result
The core idea is not “more precision.” It is better placement: a neural-shaped value grid, more local scales at equal metadata cost, an error-minimizing scale search, and mixed precision routed to the tensors that actually need it.
Primary implementation sources
The mechanics and caveats on this page were checked against the Ciru ROCmFPX implementation—not inferred from generic FP4 literature.